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Package Information Summary Types
Alphanumerical Order
Quality Assurance
Mobile Communication
GSM/PCN DECT RF-Building Blocks
Microelectronics Training Center Information Literature
Digital Terminal
Analog Line Cards
Semiconductor Group Addresses
Digital Exchange System
Digital Line Cards
Primary Rate Interface (PRI) Switching, Attenuation Conferencing Family Communication Network Development Systems Information Technology
Asynchronous Transfer Mode (ATM)
IOM®, IOM®-1, IOM®-2, SICOFI®, SICOFI®-2, SICOFI®-4, SICOFI®-4µC, SLICOFI®, ARCOFI® ARCOFI®-BA, ARCOFI®-SP, EPIC®-1, EPIC®-S, ELIC®, IPAT®-2, ITAC®, ISAC®-S, ISAC®-S ISAC®-P, ISAC®-P IDEC®, SICAT®, OCTAT®-P, QUAT®-S registered trademarks Siemens MUSACTM-A, FALCTM54, IWETM, SARETM, UTPTTM, ASMTM, ASPTM, trademarks Siemens Purchase Siemens components conveys license under Philips' patent components I2C-system provided system conforms specifications defined Philips. Copyright Philips 1983.
Siemens Aktiengesellschaft
Siemens allround-supplier Communication ICs. Siemens offers Digital Exchange Systems, Digital Terminals, Data Transmission Analog Networks, Mobile Communications Analog Telephone Sets. Communication from Siemens that means innovative wide ranging problem solving. Siemens Semiconductor Division integrated system know-how verified wide field experience excellent chip technology. short look product segment ISDN, demonstrates: development ISDN equipment from terminals public switching systems Siemens offers broadest range ISDN chips available merchant market. Siemens worldwide market leader ISDN ICs, their high level functionality resulting greatly simplified system design. addition, industry standard IOM-2 interface supports flexible system architecture with compatible devices. Siemens represents technology leadership, offers powerful software application tools.
Siemens your partner Communication ICs: Innovative complete system solutions Highly optimized devices Reliable volume production lines advanced technology innovation Technical support over world Long term experience skilled expert teams Long term customer relationships Excellent quality Basic success factors further innovations Experienced team Device macros Design tools Technology fact that Siemens offers broad range Communication overview spectrum presented this brochure. have further questions need application support, please contact your local Siemens office. Addresses will find this brochure. Call Siemens your partner Communication ICs!
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Quality Assurance
Quality Assurance
high quality reliability integrated circuits from Siemens result carefully managed design production which systematically checked controlled each stage. procedures subject quality assurance system; full details given brochure "Quality Assurance lntegrated Circuits".
Figure show most important stages system. Quality assurance (QA) departments, independent production development, responsible selected measures, acceptance procedures information feedback loops. Operating departments have state-ofthe-art test measuring equipment their disposal, work according approved methods statistical quality control, provided with facilities accelerated life environmental tests used both qualification routine monitoring tests. latest methods equipment preparation analysis employed achieve continuity quality reliability.
Specifications, Product Plan, Quality Requirements
Design Rules Check Suitability Technology Design Phase
Estimate Reliability Planning Qualification Release Qualification Program Engineering Samples
Concept Release
Design, Optimization, (Redesign)
Specification met, Process frozen, Production Start
Preliminary Documentation
(Fab Instructions)
First Results Qualification Tests Clearance delivering limited Quantities
Pre-Series Release
Production Phase
Production Reproducible Release, Reliability Monitoring under Surveillance
Pre-Series Samples and-Deliveries
Final Documentation (Data Sheet, Instruction)
Complete Qualification Results Clearance unlimited Deliveries Series-Samples and-Deliveries
ITA05872
Series Release
Series Production
Figure
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Quality Assurance
Quality Capability Audits
Suppliers
Parts, Materials (Physical, Electrical)
Incoming Inspection Wafer Fabrication Electrical/Optical Chip Testing Testing Process Parameter Visual Wafer Inspection
Process Audits
Physical Parameters Dimensions, Geometries visual recognizeable Failures
Wafer Clearence Visual Chip Test Attach Wire Bond Strength
Process Audits
Seperation Assembly, Wire Bonding, Vis. Examination before Encapsulation
Visual Inspection bonded Chips
Assembly Clearance Sealing/Molding Cavity Packages; Hermeticity Test Final Surface Leads Product Marking Screening (e.g. Burn-IN) Specified) Failure Analysis defective Parts
Process Audits
Plastic Packages; X-ray Test Vis. Inspection Lead Surface
Process Audits
Final (Outgoing) Product Test (Electrical/Mechanical) Packing Shipment
100% Performed Outgoing Inspection Electrical Function, Parameters Mechanical Data Product Clearance Sample Tests Performed Quality Assurance Department Surveillance Process Steps Equipment
ITA05873
Periodical Reliability Monitoring
Figure
Product ready Shipment Stock, Shipping
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Conformance
Each integrated circuit subjected final test production process. These tests carried computer-controlled, automatic test systems hundreds thousands operating conditions well large number static dynamic parameters have considered. Moreover, test systems extremely reliable reproducible. quality assurance department carries final check form lot-by-lot sampling inspection additionally ensure minimum percent defectives ensure statistically that released lots less than agreed. Sampling inspection performed accordance with inspection plans 40080, well identical MIL-STD-105 410.
Reliability monitoring general course failure rate versus time shown so-called "bathtub" curve.The failure rate peak during first operating hours (early failure period). After early failure period ended, "constant" failure rate period starts during which failures occur approximately uniform rate. This period ends with repeated rise curve during wear-out failure period. ICs, however, latter period usually lies beyond service life specified individual equipment. Reliability tests usually destructive examinations. They are, therefore, carried with samples. Most failure mechanisms accelerated means higher temperatures. temperature dependence failure mechanisms, possible simulate future operational behavior within short time applying high temperatures; this called life test. acceleration factor life test obtained from Arrhenius's equation where temperature which life test performed, assumed operating temperature Boltzmann's constant. Important factor activation energy lies between differs considerably individual failure mechanisms. Siemens reliability data from life tests converted operating temperature assuming average activation energy acceleration factor life tests thus compared with operational behavior. This method considers also failure mechanisms with activation energy, i.e. which only slightly accelerated temperature effect. Various reliability tests periodically performed with types that representative certain production line this described brochure "Quality Assurance Integrated Circuits". Such tests e.g. humidity test relative humidity, pressure cooker test, well life tests 1000 hours more. Test results available form summary reports.
Reliabilitiy
Measures taken during development reliability already considerably influenced development stage. Siemens has, therefore, fixed certain design standards development circuits layout, e.g. specifying minimum width spacing conductive layers chip, dimensions electrical parameters protective circuits electrostatic charge, etc. examination with carefully arranged programs operated large-scale computers guarantees immediate identification elimination unintentional violations these design standards. In-process control during production manufacturing integrated circuits comprises several hundred production steps. each step executed with utmost accuracy, in-process control outstanding importance. Some processes require more than hundred different test measurements. tests have been arranged such that individual process steps reproduced continuously. decreasing failure rates reflect never ending effort this direction; course years they have been reduced considerably despite immense increase complexity.
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Quality Assurance System Quality Assurance Manual
Quality principles, organization, responsibility competence quality assurance procedures measures during design production summarized Semiconductor Group Quality Assurance System. This system also covers
9000/EN 29000 requirements. documented Quality Assurance Manual. This manual guideline mandatory Semiconductor Group departments. Suppliers also tied into system.
CECC certification independent test trials center Semiconductor Group, which Villach Plant also profits from.
Villach Plant certified internationally recognized standard 9002 1991.
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Mobile Communication
One-Chip Logic Device GOLD 2705
Siemens Aktiengesellschaft
GSM/PCN
Introduction have evolved last years from pan-european into global standards digital cellular mobile radio systems. radios small, easy-to-use very competitively priced with older analog systems explosive growth subscribers clearly testifies. Product Overview Type Short Title Description Applications Page Siemens Semiconductor played leading role this Siemens Semiconductor played leading role this growth first supplier commercially available growth first supplier commercially available standard GSM/PCN chip sets. after production standard GSM/PCN chip sets. Now,after production optimizations GOLD chip set, Siemens offering optimizations GOLD chip set, Siemens offering evolutionary step forward intergration level provide evolutionary step forward integration level provide complate generation with chip solution, GOLD plus. complete generation with chip solution, GOLD plus.
Baseband 2705 2706 2707 2708 2900 2905 2200 2205 Direct Vector Modulator Direct Vector Modulator Cellular (GSM, PDC, DAMPS, CDMA), WLAN, QPSK/QAM modulation GHz) Cellular (GSM, PCN, PCS, PDC, DAMPS, CDMA), Cordless (PHS), WCPE, WLL, WLAN, QPSK/QAM modulation GOLD GOLD GOLD-SP GOLD-SX GBBC GAIM One-Chip Logic Device System Controller Signal Processor Co-Processor Advanced Features Baseband Codec Analog Interface Module GSM, PCN, PCS-1900 GSM, PCN, PCS-1900 GSM, PCN, PCS-1900 GSM, PCN, PCS-1900 GSM, PCN, PCS-1900 GSM, PCN, PCS-1900
2240 2245
Transmitter, Transmitter,
Cellular (GSM, PDC); QPSK/QAM modulation Cellular (PCN, PCS), Cordless (PHS); QPSK/QAM modulation 1.65 1.85
2247 2306 2401 2405 2407
Transmitter, Receiver/Demodulator Circuit Receiver, PCN/PCS Receiver,
Cellular (PCN, PCS), Cordless (PHS); QPSK/QAM modulation 1.95 analog digital systems IFsynthesizer
Cellular (GSM, PDC, DAMPS, CDMA), WLAN, QPSK/QAM modulation Cellular (GSM, PDC, DAMPS), WLAN, QPSK/QAM modulation Cellular (PCN, PCS) WLAN, QPSK/QAM modulation
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Mobile Communication
GP-DSP Voiceband
Speech Decoder
GOLD 2705
Channel Decoder Hard"
GBBC 2900 Baseband
2401
CGY60 BEP420 2306
RF-PLL
Equalizer Hard"
Baseband Voiceband
4144-3015
Synth.
Presc.
Speech Encoder Channel Encoder
Synth.
GMSK
Out. Stage 2200
BAR63 BAR80
Control
Control
CGY120 CGY92
System Interface
Control
Card
80C166
PROM
Flash
ITB05946
Block Diagram Handy Phone (1st Gen.)
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Mobile Communication
GAIM (PMB 2905) GOLD-SP (PMB 2707) 2405/2407 Voiceband
Speech Channel Decoder
Soft" Equalizer
Synth.
RF-PLL
Baseband
2307 BAR63 BAR80
Voiceband
4144-3015
Voice Band Filters Baseband
Speech Channel Encoder
Synth.
Presc.
GMSK
Out. Stage 2240 CGY120 CGY92
Control
Control
System Interface 80C166 GOLD-µC (PMB 2706) PROM Flash
Card
Control
ITB05945
Block Diagram GSM/PCN Fullrate Halferate Mobile
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One-Chip Logic Device (GOLD)
2705
General Description One-Chip Logic Device (GOLD) 2705 performs tasks error protection, ciphering, radio channel equalization, error detection correction, synchronization etc., above microcontroller core controls baseband functions GSM-mobile terminal. Features Four function modules integrated chip 16-bit microcontroller Channel codec Equalizer System interface special external-channel-codec mode selectable software Four operational modes selectable pins: Normal mode External-controller mode External-channel-codec mode (different from special mode!) External-equalizer mode
Type 2705-F
Package P-TQFP-176-1 (SMD)
Four single modes selectable pins Controller test mode System interface test mode Channel-codec test mode Equalizer test mode sizes address spaces covered chip-select signals selectable pin: Kbyte Mbyte Programmable power saving modes JTAG-boundary scan (acc. IEEE Std. 11491) Single supply voltage power consumption Temperature range
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Chip Logic Device (GOLD)
2705
FCBDET_SP
(9:6) (5:0) SYNDAT SYNCLK SYNSTR PADAT PACLK PASTR RXON TXON CCIN CCIO CCLK CCRST CCVZ CCVZQ CLKANA RXON EOCLK Interface
FCBDET_EO CSEO CLKEO MONON EOON
Equalizer
Interface
RESET
EQCLK EQVAL EQDAT SPDO SPVALD SPCLK
EOON Interface
Channel Decoder
Interface
INTD
CLKD
EOCLK EOVAL EODAT FOCH
INTEQ
SPVALU SPDU
System Interface
TXMASK
TMSK
CSDSP
CLKDSP
CLKC CODON RESET
CHC_INT TM_INT CHC_INT TM_INT
Channel Encoder
IDAC QDAC TSTR (9:0) CODON
PROM
CSRAM
RESET
INTC
CSEPROM CSEPROM
SELCLK OSCCTRL
Interface
Port
Port Port
Port Port Port
CLKPR
BUSACT
XTAL XTAL
HW_PWDN
Oscillator
PWDN
Embedded 80C166
RSTOUT
RESET
RESET
MODE MUXBUS RESET
ITB05947
Block Diagram
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GOLD System Controller (GOLD-µC)
2706
General Description GOLD System Controller (GOLD-µC) part chip set, which covers functions mobile radio provided Global System Mobile communications, GSM. mobile terminal which contains this chip will meet performance requirements down recommendations speech data services. GOLD-µC contains 16-bit microcontroller type 80C166 with address space being extended from Kbyte Mbyte system interface block which comprises series GSM-specific interfaces control functions.
Type 2706-F Features
Package P-TQFP-144-2 (SMD)
Integrated 16-bit microcontroller (SAB 80C166) with 2-Mbyte linear address space Complete development tooling available System interface with synthesizer, AGC, control, chip card interfacing, timing signal generation, clock generation Bidirectional tristate buffer GOLD-SP access controller memory Package P-TQFP-144, 0.50 pitch supply voltage
Components General Purpose Ports Chip Card System Interface Data 80C166 Microcontroller Data
Address Data
Address Data Ports
Tristate Buffer
GOLD-SP
ITB06063
Block Diagram
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GOLD Signal Processor (GOLD-SP)
2707
General Description GOLD Signal Processor (GOLD-SP) part chip set, which covers functions mobile radio provided Global System Mobile communications, GSM. mobile terminal which contains this chip will meet performance requirements down recommendations speech data services. GOLD-SP contains fullrate speech codec, channel codec with soft-decision decoding complex Viterbi equalizer, firmware. Moreover digital filtering needed baseband voiceband processing, also GMSK modulation performed this chip.
Type 2707-F Features
Package P-TQFP-100-1 (SMD)
parallel cores type each with high performance MIPS current consumption mA/MlPS), memory needed fullrate operation chip, shared access complete controller memory functions realized firmware Complex soft-output equalizer Frequency correction burst handling Full duplex handsfree Channel coding Soft-decision decoding (bit-by-bit) Speech coding decoding (RPE-LTP) Digital baseband filter Automatic amplitude calculation Automatic amplitude offset measurement Ciphering with A51/A52 Digital voiceband filters (receive, transmit) GMSK modulator PLL-based system clock generation Package: P-TQFP-100, 0.50 pitch supply voltage
Ciphering Voice Band Voice Band Voice Band Voice Band Speech Encoder Channel Encoder Burst GMSK BaseBand Speech Decoder Channel Decoder "Soft" Equalizer "Soft" Base Band BaseBand
ITB06064
Block Diagram
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Co-Processor Advanced Features (GOLD-SX)
2708
General Description GOLD-SX part complete chip which covers functions mobile radio Global System Mobile communications, GSM. mobile terminal which contains this chip meet performance requirements down Technical Specifications GSM, PCS-1900. GOLD-SX used advanced features. function GOLD-SX dependent firmware. first version GOLD-SX performs Half-Rate speech encoding including Voice Activity Detection (VAD) Discontinuous Transmission (DTX), well Half-Rate speech decoding including Discontinuous Reception (DRX, Comfort Noise). planned version will perform: Enhanced Full-Rate speech coding including functions Half-Rate speech coding. Features Firmware: GOLD-SX available versions with different mask programmed code: Half-Rate Codec Half-Rate Speech Codec (GSM 6.02, 6.06, 6.07, 6.20) Voice activity detection, (GSM 6.42) Discontinuous transmission, (GSM 6.41)
Type 2708-F
Package P-TQFP-64-1 (SMD)
Comfort noise generation, (GSM 6.22) Serial data exchange with Half-Rate Channel Codec voiceband unit GOLD-SP Serial data exchange with system simulator interfacing Enhanced Full-Rate Codec Enhanced Full-Rate Codec Voice activity detection, Discontinuous transmission, Comfort noise generation, Serial data exchange with Enhanced Full-Rate Channel Codec voiceband unit GOLD-SP Serial data exchange with system simulator interfacing Hardware: core type SPCE (Siemens Signal Processor Core Enhanced) offering high performance MIPS MHz, current consumption (approx. mA/MIPS) Program 0.25 RAM, Data on-chip PLL-based clock generation (13-MHz input) Package: P-TQFP-64, mm2, 0.50 pitch supply voltage
XRAM
YRAM
Prog.
Prog. 0.25
Data
Program Signal Processor Core Data
Clock Unit 9.75
Block Diagram
Test Select Bound. Scan
GOLD-SP
Test
ITB08488
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Baseband Codec (GBBC)
2900
Preliminary Data Overview Baseband Codec (GBBC) performs analog-todigital digital-to-analog conversion baseband signals additionally digital-to-analog conversion control signal provided power amplifier. GBBC part chip set, which covers functions mobile radio provided Global System Mobile communications, GSM. mobile terminal which contains this chip will meet performance requirements down recommendations.
Type 2900-H General Features
Package P-MQFP-64-1 (SMD)
JTAG-boundary scan (acc. IEEE Std. 1149.1) Single supply voltage Ambient temperature range
CLKANA
ADCSTB Mixer Buffer (3:0)
2.166 Offset Counter
Prefilter
Analog Digital
Window
Prefilter
Window
Offset Counter
RXON
Postfilter (6th ord.) Logic Postfilter (6th ord.) Logic CLKANA Clock PAOUT VREFEXT Sample Hold Analog
TSTR Technique) Digital Technique)
Logic
IDAC QDAC
Latch
(9:0) Latch
TXON PASTR PACLK String) Latch Register PADAT
BIAS
ITB05948
Block Diagram
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Analog Interfacing Module (GAIM)
2905
General Description Analog Interfacing Module (GAIM) part chip set, which covers functions mobile radio provided Global System Mobile communications, GSM. mobile terminal which contains this chip will meet performance requirements down recommendations speech data services. GAIM provided analog-to-digital digital-to-analog conversion baseband voiceband signals well. Moreover digital-to-analog conversion power control signal performed this circuit.
Type 2905-F Features
Package P-TQFP-64-1 (SMD)
Baseband receive A-to-D converter analog antialiasing filter (2nd order Bessel) order sigma-delta modulators baseband receive battery measurements Baseband transmit D-to-A converter switched-capacitor-type analog postfilter order Bessel) Power ramping control D-to-A converter 8-bit resistor-string-type Voiceband receive D-to-A converter pass filter following digital -modulator GOLD-SP programmable earpiece gain stages Voiceband transmit A-to-D converter order sigma-delta modulator analog antialiasing filter programmable microphone gain stages Package P-TQFP-64-1, pitch supply voltage
Battery
Demodulator
Battery
Modulator
Module
Micro Phones
Loud Speakers
Switch
Switch
Latches
Latch
Baseband Filters
Block Diagram
GMSK Modulators
Control
Voiceband Filters
ITB08458
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Transmitter Transmitter Transmitter
2240 B6HF 2245 B6HF 2247 B6HF
General Description 2240, 2245, 2247 family single-chip transmitters which include prescaler RF-oscillator signal fixed IF-oscillator signal. transmitter family designed combination with single-chip receiver family 2405, 2407 2307 mobile telephones according GSM, standards other vector modulated digital systems. fabricated using Siemens B6HF silicon process: Chipset 2240 2405 2307 Chipset 2245 2407 2307 Chipset 2247 2407 2307
Type 2240-F 2245-F 2247-F Application
Package P-TQFP-48-1 (SMD) P-TQFP-48-1 (SMD) P-TQFP-48-1 (SMD)
Vector modulated cellular cordless systems: 2240: GSM, PDC, DAMPS 2245: PCN, PCS, 2247: PCN, PCS, etc. Various modulation schemes, such PSK, FSK, QAM, QPSK, GMSK etc. Analog systems with modulation Space power saving optimizations existing discrete transmitter circuits Features Transmitter with modulator Direct modulation Generation orthogonal carriers with possibility phase adjust with external resistors 30-dB carrier rejection, 40-dB rejection 48-dB rejection third order products with 500-mVpp I/Q-drive level High output power with appropriate power matching network 500-mVpp I/Q-drive level 2240: dBm, 2245: 2247: Integrated active part oscillator Possibility external RF-oscillator signal RF-oscillator signal buffered off-chip use, especially receiver 2405/07 Prescaler RF-oscillator signal Possibility oscillator integrated 2405/07 Possibility external IF-oscillator signal Fixed frequency (FIX-PLL) IF-VCO (PMB 2240, 2245), switchable working 450-MHz 150-MHz frequency (PMB 2247) Supply voltage range P-TQFP-48 package Temperature range
2240/45/47 transmitters include active structures main oscillator circuit. Alternatively oscillator signal supplied from external source. oscillator signal buffered off-chip use. There prescaler 64/65 RF-oscillator signal chip, which used implement 2307 circuit. on-chip FIX-PLL consists system clock divider, IF-oscillator signal divider, phase detector charge pump. IF-oscillator signal divider driven oscillator 2405/07 external discrete VCO. IF-oscillator signal divider ratio 2240 2245 fixed. selected either divided using 2247 2407 drive FIX-PLL with frequencies (450 MHz) avoid spurious problems application. oscillator signals combined transmit mixer, image sideband other mixing products suppressed external interstage filter. filtered signal reenters chip modulator inputs. modulator generates orthogonal carriers which mixed with modulation signals multipliers. phase between carriers fine-adjusted (orthogonality) external resistors maximum suppression. outputs multipliers added amplified linear output stage.
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Transmitter Transmitter Transmitter
2240 B6HF 2245 B6HF 2247 B6HF
Baseband
System Clock Phase Det. 1126 1206
2240
P-TQFP-48 System Clock
2307
P-TSSOP-16
Baseband
Data Register
Wire
P-TQFP-48
2405
ITB08463
Application 2240 2405 2307
Siemens Aktiengesellschaft
Receiver PCN/PCS Receiver
2405 B6HF 2407 B6HF
General Description 2405, 2407 family single-chip doubleconversion heterodyne receivers with LO-phase shifting circuitry I/Q-phase demodulation chip. also includes switchable noise amplifier, second local oscillator with output buffer, programmable gain controlled amplifier, differential operational amplifiers base band signal filtering power-down circuitry. receiver family designed combination with single chip transmitter family 2240, 2245, 2247 2307 mobile telephones according GSM, standards other vector modulated digital systems. fabricated using Siemens B6HF silicon process. Chipset 2405 2240 2307 Chipset 2407 2245 2307 Chipset 2407 2247 2307
Type 2405-F 2407-F Applications
Package P-TQFP-48-1 (SMD) P-TQFP-48-1 (SMD)
Vector modulated cellular cordless systems: 2405: GSM, PDC, DAMPS, 2407: PCN, (DCS1900), WLAN etc. Various demodulation schemes, such PSK, FSK, QAM, QPSK, GMSK Space power saving optimizations existing discrete demodulator circuits Features Heterodyne receiver with demodulator On-chip, noise amplifier (LNA), Demodulation generation components mixer noise (SSB) High input intercept point Integrated phase shifter amplifier with programmable gain control (PGC) steps On-chip second oscillator with external tuning circuit possibility amplifier differential operational amplifiers base band filter amplifier power consumption highly flexible power-down capability Wide input frequency range Wide range from Supply voltage range P-TQFP-48 package Temperature range
input signal amplified internal filtered external filter. filtered signal first local oscillator signal mixed down intermediate frequency (IF). amplification signal performed digitally programmable gain-controlled amplifier. second local oscillator signal generated either on-chip oscillator external VCO. internal signal divider (PMB 2405-by 2407-by then buffered output also divider, which generates orthogonal signals half frequency. filtered signal re-enters chip input, where amplified converted final output frequency with each orthogonal signals. resulting in-phase inquadrature signals pass through differential output drivers. differential operational amplifiers used active baseband filters. both outputs differential offset sensed sample hold circuitry. feedback loop corrects remaining offset error below tolerable input value GAIM 2905 other baseband converter.
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Receiver PCN/PCS Receiver
2405 B6HF 2407 B6HF
Baseband 1850 1910 1850 1910
System Clock
Phase Det.
1700 1765
2247
P-TQFP-48 System Clock 1930 1990
2307
P-TSSOP-16
1930 1990
Baseband
Data Register
Wire
P-TQFP-48
2407
ITB08464
Application 2247 2407 2307
Siemens Aktiengesellschaft
Receiver PCN/PCS Receiver
2405 B6HF 2407 B6HF
Baseband 1710 1785 1710 1785
System Clock Phase Det. 1546 1634
2245
P-TQFP-48 System Clock
2307
P-TSSOP-16
1805 1880
1805 1880
Baseband
Data Register
Wire
P-TQFP-48
2407
ITB08465
Application 2245 2407 2307
Siemens Aktiengesellschaft
DECT (Digital European Cordless Telecommunication)
Introduction DECT coming Digital European Cordless Telecommunication standard which been defined wide range different applications. meets requirements cordless equipment users home applications, office environment (e.g. cordless PBX) public wireless local loop. DECT result teamwork between industry, administration service providers from over Europe. will introduced countries high potential accepted standard also outside Europe. Product Overview Type Description
first supplier worldwide, Siemens Semiconductor offers complete highly integrated DECT system solution which covers baseband processing well front end. Siemens' solution DECT mobile station cuts down component count first generation design from more than parts less than components saves cost, board space power. Besides solutions DECT home terminals handheld systems, solutions provided cordless systems, cordless wireless local loop applications, too.
Applications
DECT Baseband 27201/2 DECT Baseband Controller Handhelds 27251/2 DECT Baseband Controller Basestation 2727 2728 2920 DECT 2220 2306 2420 DECT Transmitter, DECT Receiver, Cordless (DECT); modulation analog digital systems synthesizer Cordless (DECT), modulation DECT Burst Mode Controller DECT Burst Mode Controller ADPCM Codec Keys Systems DECT Baseband Analog
Siemens Aktiengesellschaft
DECT (Digital European Cordless Telecommunication)
27201 2220 Power Presc. Gau. Filter Burst Encoding Speech Encoding ADPCM Speech Decoding
Keypad Display E2PROM
2920 Ringer
Shunt Diodes 2306 Loop Filter
Driver
Burst Decoding
4144-3015
Filter
2420 RSSI Demod. Compara.
DECT
Baseband
ITB08459
DECT System Solution
Siemens Aktiengesellschaft
DECT Digital Circuit Handhelds
27201/2
General Description DECT-Digital Circuit Handhelds devices Siemens chip digital cordless telephone specified DECT standard. device designed cordless handhelds highly integrated circuit realizes most system functions needed such equipment. circuit contains digital signal processor, 8-bit 80C51-compatible microcontroller burst mode controller. Furthermore circuit handles interfacing different components DECT chipset feature controller. device fabricated using Siemens advanced CMOS technology will available package. Further baseband controllers 27221 (romless version with RAM).
Type 27201/2 Features
Package P-TQFP-128-1 (SMD)
8-bit with integrated ROM/RAM Integrated controller 32-kbit/s ADPCM-transcoder Digital filtering gain stages Burst mode controller Power-down mode programmable voltage detection Power supply power consumption Advanced power CMOS technology Encryption 27201: ROM, 27202: ROM,
Data Port kbit/s)
Crystal 10.368
Clocks Input Data
Timers RF-Interf. Serial
Synchronization Descramble TDMA Data 1.152 Mbit/s Scramble
Speech Data (PMB 2920)
Interpolation Decimation
Codec Filter
ADPCM Transcoder
Control
Output Data Serial Control Encryption Decryption Power Control
Burst-Error-Concealment Tone Generation
Burst-Mode-Logic
Internal kBytes 8-Bit Internal kBytes
Timers
Port Keypad
Port Keypad LCD-Drivers Interrupts
Port Addit.
RSSI Battery Control
Microcontroller Unit
Watchdog
ITB08460
Block Diagram 27202
Siemens Aktiengesellschaft
DECT Digital Circuit Basestations
27251/2
General Description DECT-Digital Circuit Basestations devices Siemens chip digital cordless telephone specified DECT standard. device designed single cordless fixed stations highly integrated circuit realizes most system functions needed such equipment. circuit contains digital signal processor, 8-bit 80C51-compatible microcontroller burst mode controller. Furthermore circuit handles interfacing different components DECT chipset. device fabricated using Siemens advanced CMOS technology wilI available package.
Type 27251/2 Features
Package P-TQFP-128-1 (SMD)
8-bit with integrated ROM/RAM bit/s ADPCM-transcoder Digital filtering gain stages Echocancellation Burst mode controller Internal calls possible Power supply voltage: power consumption Advanced power CMOS technology Encryption 27251: 27252: ROM,
Data Port kbit/s)
Crystal 20.736
Clocks Input Data
Timers RF-Interf. Serial
Synchronization Descramble TDMA Data 1.152 Mbit/s Scramble
Speech Data (PMB 2920)
Interpolation Decimation
Codec Filter
ADPCM Transcoder
Control Internal Switch
Output Data Serial Control
Burst-Error-Concealment Tone Generation
Burst Mode Logic
Encryption Decryption Power Control
Internal KBytes 8-Bit Internal KBytes
Port Keypad Timers Tonedect. Microcontroller Unit
Port Addit. Interrupts
Watchdog
RSSI
ITB08461
Block Diagram 27252
Siemens Aktiengesellschaft
DECT Multichannel Burst Mode Controller
2727
General Description DECT Multichannel Burst Mode Controller devices Siemens chip designed cordless applications specified DECT standard. device handle twelve DECT channels. supports most Medium Access Control (MAC) layer Physical layer (PHL) functions specified DECT standard. interface standard 8-bit microcontroller (Motorola Intel compatible) implemented. Furthermore IOM-2 interfaces integrated e.g. direct connection transceivers (ISAC-P TE). on-chip interface allows control DECT-RF circuitry with minimum discrete components. circuit used DECT basestations (Radio Fixed Parts RFPs). device supports unprotected data transmission. device fabricated using Siemens advanced CMOS technology will available package.
Type 2727-H Features
Package P-MQFP-100-2 (SMD)
Power-down mode programmable Power supply voltage: power consumption: Advanced power CMOS technology
Chipselect Logic
Digital LFInterface
Timer Clock Unit
BMC-Core-Functions Data Control Memory Serial Serial Descramble RF-Interface Scramble
RFPort
Interface
Synchronization
Channel Control Registers
Encryption Decryption
Headerpreprocessing
RSSI
Boundary Scan Wafertest
Microcontroller Interface
Address Decoder
Microcontroller
Block Diagram
ITB05954
Siemens Aktiengesellschaft
DECT
2728
General Description DECT circuit devices Siemens chip designed cordless basestations specified DECT standard. circuit consists main functional blocks, these Burst Mode Controller (BMC) Digital Signal Processor (DSP). handle DECT channels. supports timecritical functions specified DECT standard. Either internal connections between handheld internal external connections handled. interface standard 8-bit microcontroller (Motorola/Mitsubishi Intel compatible) implemented. on-chip interface allows control DECT-RF circuitry with minimum discrete components. one-chip handle PCM/ADPCM transcording echosupression DECT standard channels.
Type 2728-H Features
Package P-MQFP-100-2 (SMD)
Power supply voltage: power consumption P-MQFP packaging Advanced power CMOS technology
Furthermore IOM-2 interface integrated e.r. connection ISDN interface device (lSAC-S) high feature codec device (ARCOFI, 2163). analog line interfaces circuits 2920 directly connected 2728. Furthermore additional interface implemented connection answering machine. device fabricated using Siemens advanced CMOS technology will available package.
2920 ISDN-Interface PCM-Interface
ADPCM-Codec
Interp. Decim. Interp. Decim. Interface
CodecADPCMFilter Trancoder Echocontrol CodecADPCMFilter Trancoder Echocontrol Addition PCM-Intf.
Control Data Memory ADPCM Burst Coding Interface Decoding ch.) Control
Serial
Descramble
Serial Synchronization Burst Switch Control
Scramble
Timer
Clocks
RFInterface Control
Channel Control Registers
Encryption Decryption
Microcontroller Interface 2728
ITB05955
Microcontroller
Block Diagram
Siemens Aktiengesellschaft
DECT Analog Circuit
2920
General Description DECT-Analog Circuit devices Siemens chip digital cordless telephone specified DECT standard. device designed cordless handhelds cordless fixed stations highly integrated circuit realizes analog front functions needed such systems. circuit contains A/D- converter adjustable gain stages. Connection microphone earpiece possible with minimum external components. Furthermore device generates reference voltages converter TXDA output voltage stabilization LCD-display-driver modules integrated DECT-Digital Circuit. reference voltages used together with external components 27201, 27202, 27221, 27251, 27252 2728 volume control ringer. device fabricated using Siemens advanced ACMOS technology will available package.
Type 2920-S Features
Package P-SSOP-24-1 (Shrink, SMD)
High performance A/D- conversion Adjustable analog amplifiers Analog front direct connection handset mouth earpiece On-chip microphone supply generation Power savings power-down MUTE functions Comparator preprocessing demodulated receive signal Reference voltage generation on-chip A/D- converters DECT-Digital Circuit Support volume control tone ringer signal
RXDI RXREF
Microphone MICS Ref. Volt. Generation Earpiece RCTI Control Block (REF Digital Audio Interface
RXDA
Data (Clock) (Frame) Data
Ringer Control
ITB08462
Block Diagram
Siemens Aktiengesellschaft
DECT Transmitter
2220
General Description 2220 high speed analog bipolar Siemens chipset Digital European Cordless Telephone. Combined with (i.e. 2306) power amplifier, 2220 device performs complete DECT transmitter. Additionally phase locked loop switched receive mode used local oscillator receiver mixer 2420.
Type 2220-S Features
Package P-SSOP-24-1 (Shrink, SMD)
Either single operation (for receive transmit) dual operation (one receive transmit) possible 64/65-prescaler chip Frequency doubler receive transmit mode with balanced driver outputs Supply voltage regulator (with external pnp-transistor) VCO's Power-down inactive Current reference output charge pump constant lock-in time Wide power supple range
GND3
LOB1
LOE1
LOE2
LOB2
Voltage Regulator
(Rx)
Processor 1÷64/65
Bandgap reference, charge pump reference, VCO-power decoder
GND1
GND2
ITB05958
PSRUN
TXON TXLOFF
Block Diagram
Siemens Aktiengesellschaft
DECT Receiver
2420
General Description 2420 high speed analog bipolar Siemens chipset Digital European Cordless Telephone specified DECT standard. control inputs RSSI signal output match with 27201/2 27221 27251/2 2728 2727 digital circuits. operates heterodyne receiver using intermediate frequency (IF) MHz. consists mixer downconvert DECT-RF signal from 1.89 MHz, limiter amplifier, field strength measurement unit (RSSI) with peak-hold output, coincidence demodulator, sample-and-hold circuit offset compensation operational amplifiers basehand filtering. Features Wide supply range Single conversion solution; advantages are: supply current total part second image frequency therefore insensitive strong transmitters radiofrequencies total component count mixer included chip
Type 2420-S
Package P-SSOP-28-1 (Shrink, SMD)
Single balanced mixer with current-saving open collector output chip Limiter RSSI dynamic range: between RSSI output independent supply voltage temperature with accuracy Peak-hold output RSSI signal, reset controller RSSG Sample-and-hold control circuit baseband threshold acquisition, loop opened closed RXDSG, offset compensation value stored during standby mode Timing RSSI sample-and-hold determined controller operational amplifiers chip baseband filtering, included sample hold control loop Standby mode with reduced supply current Balanced circuitry throughout Parts improve signal isolation Maybe applied part complete DECT-chipset solution
DSTP RXDSG RSTP
RXOFF GND2 Standby
RSSG
Bandgap
RSSI
Integrator Hold Interface Gating Sample Hold
Gating Limiter Amplifier with RSSI Current Sources
Discharge Switch Peak-hold Stage
Buffer Amp.
Block Diagram
GND1
ITB05959
OP1I OP1Q
OP2I RXREF RXDI
Siemens Aktiengesellschaft
RF-Building Blocks
Introduction mobile communications lead explosion variety applications. Active many years this field with high performance solutions, Siemens have found almost wireless systems generally recognized their high performance, functionality cost-effectiveness. Building upon success 2200 modulator family, 2401 receiver Siemens PLLs (TBB 200/TBB 206/PMB 2306), B6HF bipolar technology will allow further increase performance, lower current consumption well higher frequencies. Starting with prescalers 2313/2314, standard RF-building blocks will gradually moved B6HF.
Product Overview Type Description Applications
Modulator/Transmitter 2200 Direct Vector Modulator Cellular (GSM, PDC, DAMPS, CDMA), WLAN, QPSK/QAM modulation
2201 B6HF Direct Vector Modulator Mixer, Cellular (GSM, PDC, DAMPS, CDMA), WLAN, QPSK/QAM modulation 2202 B6HF Direct Vector Modulator Mixer, Cellular (PCN, PCS, PDC), Cordless (PHS, WCPE) WLL, WLAN, QPSK/QAM modulation 2205 Direct Vector Modulator
Cellular (GSM, PCN, PCS, PDC, DAMPS, CDMA), Cordless (PHS, WCPE) WLL, WLAN, QPSK/QAM modulation Cellular (GSM, PCN, PCS, PDC, DAMPS, CDMA), Cordless (PHS) WCPE, WLL, WLAN, QPSK/QAM modulation Cordless (DECT), modulation Cellular (GSM, PDC), QPSK/QAM modulation Cellular (PCN, PCS), Cordless (PHS), QPSK/QAM modulation 1.65 1.85 Cellular (PCN, PCS), Cordless (PHS), QPSK/QAM modulation 1.95
2207 B6HF Vector Modulator Upconverter Mixer, 2220 DECT Transmitter, 2240 B6HF Transmitter, 2245 B6HF Transmitter, 2247 B6HF Transmitter,
Demodulator/Receiver 2401 2402 Receiver/Demodulator Circuit Broadband Receiver/Vector Demodulator Cellular (GSM, PDC, DAMPS, CDMA), WLAN, QPSK/QAM demodulation CATV, Satellite (MSAT, VSAT), WLL, WLAN Cellular (GSM, PDC, DAMPS), WLAN, QPSK/QAM demodulation Cellular (PCN, PCS), WLAN, QPSK/QAM demodulation Cordless (DECT), demodulation
2405 B6HF Receiver, 2407 B6HF PCN/PCS Receiver, 2420 DECT Receiver,
Siemens Aktiengesellschaft
RF-Building Blocks
Product Overview (cont'd) Type Description Applications
Frequency Synthesizer, Prescaler 2302 B6HF 1.25 Dual with Prescaler, 2303 B6HF Dual with Prescaler, 2306 2307 Frequency Synthesizer Frequency Synthesizer, analog digital systems RF-, synthesizer 1.25 analog digital systems RF-, synthesizer analog digital systems RF-, synthesizer analog digital systems RF-, synthesizer analog digital systems RF-, synthesizer 1.25 analog digital systems RF-, synthesizer analog digital systems part synthesizer analog digital systems part synthesizer
2308 B6HF 1.25 with Prescaler, 2309 B6HF with Prescaler, 2313 B6HF Prescaler :64/65 :128/129; 2314 B6HF Prescaler :64/65 :128/129; LNA/Mixer, Driver/Mixer, Mixer 2330 Mixer
analog digital systems downconversion mixer analog digital systems downconversion mixer
2331 B6HF Mixer, 2332 B6HF Mixer, 2333 B6HF LNA/Driver Mixer,
analog digital systems frontend-LNA mixer analog digital systems frontend-LNA preamplifier-driver mixer
Siemens Aktiengesellschaft
Direct Vector Modulator
2200
General Description 2200 direct quadrature modulator mobile communication equipment. external signal modulator input. This signal first doubled then bandpass filtered 2f0. This frequency clock divider. output divider orthogonal carriers provided which mixed with baseband modulation signals multipliers. outputs multipliers added amplified linear output stage. allows modulator switched power-down mode. Applications Vector modulated cellular cordless systems: GSM, PDC, DAMPS, CDMA, WLAN, etc. Various modulation schemes, such PSK, FSK, QAM, QPSK, GMSK etc. Analog systems with modulation Space power saving optimizations existing discrete transmitter circuits
Type 2200-T 2200-S Features
Package P-DSO-20-1 (SMD) P-SSOP-20-1 (Shrink, SMD)
Direct modulation vector modulator Linear modulating inputs Symmetrical circuitry Wide LO-frequency range Generation orthogonal carriers without external elements without trimming carrier rejection, rejection rejection third order products linear output power Modulation frequency range Power-down mode P-DSO-20 P-SSOP-20 package Temperature range
Test Inputs LO-Inputs 1000 Frequency Doubler Filter Divider
GSM-RF-Output Linear Qutput Stage
Enable
Block Diagram
BIAS
ITB01535
Siemens Aktiengesellschaft
Direct Vector Modulator Mixer
2201 B6HF 2202 B6HF
General Description 2201, 2202 family direct quadrature modulator double balanced mixer. fabricated using Siemens B6HF silicon bipolar process. typical application wanted mixer output product bandpass filtered then modulator input. mixer also used upconvert modulator output signal higher frequencies GHz. modulator generates orthogonal carriers which mixed with baseband modulation signals multipliers. outputs multipliers added amplified linear output stage. modulator mixer have separate power supplies grounds. They powered down independently. Applications Vector modulated cellular cordless systems: 2201: GSM, PDC, DAMPS, CDMA, WLAN, 2202: PCN, PCS, PDC, PHS, WCPE, WLL, WLAN, etc. Various modulation schemes, such PSK, FSK, QAM, QPSK, GMSK etc. Analog systems with modulation Space power saving optimizations existing discrete transmitter circuits
Type 2201-R 2202-R Features
Package P-TSSOP-24-1 (SMD) P-TSSOP-24-1 (SMD)
Direct modulation vector modulator Wide LO-frequency range 2201: 2201: Generation orthogonal carriers without external elements without trimming 35-dB carrier rejection, 40-dB rejection 42-dB rejection third order products 0-dBm modulator output power Independent double balanced Gilbert cell mixer IF-frequency range from noise figure, high conversion gain Supply voltage range from power consumption Power-down mode P-TSSOP-24 package Temperature range
Bias Bias
TREF
ITB08466
Block Diagram
Siemens Aktiengesellschaft
Direct Vector Modulator Mixer
2201 B6HF 2202 B6HF
(130 MHz)
1429 1465 (940 MHz)
2201 1607 1643 (810 MHz)
TXDATA
1607 1643 (940 MHz) 130.5
2303 RXDATA RSSI
Demod. 2331
1477 1513 (810 MHz)
ITB08467
2333
Application 2201 2303 2331 2333
Siemens Aktiengesellschaft
Direct Vector Modulator Mixer
2201 B6HF 2202 B6HF
259.25
2202 1635.75 1647.75 TXDATA
1895 1907
2303 RXDATA RSSI
1646.65 1658.45 259.15 10.7 Demod. 2331 2333 248.45 1895 1907
ITB08468
Application 2202 2303 2331 2333
Siemens Aktiengesellschaft
Direct Vector Modulator
2205
General Description 2205 direct quadrature modulator mobile communication equipment. external signal modulator input. This signal first doubled then bandpass filtered 2f0. filter realized external tank circuit. Alternatively, local oscillator operating connected divider input. This signal clock divider. output divider orthogonal carriers provided which mixed with baseband modulation signals multipliers. outputs multipliers added amplified linear output stage. allows modulator switched power-down mode. Applications Vector modulated cellular cordless systems: GSM, PCN, PCS, PDC, DAMPS, CDMA, WLAN, etc. Various modulation schemes, such PSK, FSK, QAM, QPSK, GMSK etc. Analog systems with modulation Space power saving optimizations existing discrete transmitter circuits
Type 2205-T 2205-S
Package P-DSO-20-1 (SMD) P-SSOP-20-1 (Shrink SMD)
Features Direct modulation vector modulator Linear modulating inputs Symmetrical circuitry Wide LO-frequency range operation alternatively transmit frequency double transmit frequency Generation orthogonal carriers within wide frequency range carrier rejection, rejection rejection third order products linear output power Modulation frequency range Power-down mode P-DSO-20 P-SSOP-20 package Temperature range
Tank Circuit Double Transmit Frequency Inputs LO-Input Enable Frequency Doubler Buffer Divider
RF-Output Linear Output Stage
Block Diagram
BIAS
ITB05482
Siemens Aktiengesellschaft
Direct Vector Modulator Upconverter Mixer
2207 B6HF
General Description 2207 direct quadrature modulator double balanced mixer. fabricated using Siemens B6HF silicon bipolar process. typical application modulator output signal bandpass filtered then mixer input upconversion. external signal modulator input. modulator generates orthogonal carriers which mixed with baseband modulation signals multipliers. outputs multipliers added amplified linear output stage. modulator mixer have separate power supplies grounds. They powered down independently. Applications Vector modulated cellular cordless systems: GSM, PCN, PCS, PDC, DAMPS, CDMA, PHS, WCPE, WLL, WLAN, etc. Various modulation schemes, such PSK, FSK, QAM, QPSK, GMSK etc. Analog systems with modulation Space power saving optimizations existing discrete transmitter circuits
Type 2207-R Features
Package P-TSSOP-24-1 (Shrink, SMD)
Vector modulator with upconverter mixer Wide LO-frequency range from Mixer RF-frequency range Generation orthogonal carriers without external elements without trimming carrier rejection, rejection rejection third order products modulator output power Independent double balanced Gilbert cell mixer IF-frequency range from noise figure, high conversion gain Supply voltage range from Power-down mode P-TSSOP-24 package Temperature range
Bias Bias
TREF
ITB08469
Block Diagram
Siemens Aktiengesellschaft
Receiver/Demodulator Circuit
2401
Preliminary Data General Description 2401 single-chip double-conversion heterodyne receiver with phase shifting circuitry l/Q-phase demodulation chip. also includes second local oscillator, gain controlled amplifier, differential operational amplifiers audio purposes power-down circuitry. 2401 designed digital mobile telephones according standard other digital systems. Application Digital mobile cellular systems GSM, PDC, DAMPS Various demodulation schemes, such PSK, FSK, QAM, QPSK, GMSK Space power saving optimizations existing discrete demodulator circuits
Type 2401-T 2401-S Features
Package P-DSO-28-1 (SMD) P-SSOP-28-1 (Shrink, SMD)
Heterodyne receiver with demodulator Down mixing from 900-MHz receiver band base band Demodulation generation components Lower mixer noise (SSB) High intercept point Integrated phase shifter demodulator 82-dB range On-chip second oscillator with external tuning circuit differential operational amplifiers power consumption highly flexible power-down capability Wide input frequency range Wide range from P-DSO-28 package, P-SSOP-28 (Shrink) Temperature range
OUTI OUTI Diff. Amp. Output Driver Divider Divider Second Mixer Output Driver Diff. Amp. Divider
First Mixer LO-Buffer Amp.
Second Mixer
Standby
Standby
Block Diagram
OUTQ OUTQ
ITB03903
Siemens Aktiengesellschaft
Broadband Receiver/Vector Demodulator
2402
General Description 2402 single-chip single-conversion heterodyne receiver with phase shifting circuitry phase local baseband demodulation chip. also includes second oscillator, gain controlled second amplifier, differential operational amplifiers baseband fitering purposes power-down circuitry. 2402 designed digital mobile telephones according standard other digital systems. Applications Digital wideband systems CATV, Satellite, DBS, WLAN Various demodulation schemes, such PSK, FSK, QAM, QPSK, Space power saving optimization existing discrete demodulator circuit
Type 2402-S Features
Package P-DSO-28-1 (SMD)
Heterodyne receiver with demodulators Down mixing from receiver band base band Demodulation generation I/Q-baseband components mixer noise (SSB) Input high intercept point Integrated phase shifter range On-chip second oscillator with external tuning circuit power consumption highly flexible power-down capability Wide input frequency range Wide range from Wide output frequency range 13.5 Temperature range
OUTI OUTI Diff. Amp. Output Driver Divider Divider Second Mixer Output Driver Diff. Amp. Divider
First Mixer LO-Buffer Amp.
Second Mixer
Standby
Standby
Block Diagram
OUTQ OUTQ
ITB03903
Siemens Aktiengesellschaft
1.25-GHz Dual with Prescaler 2.5-GHz Dual with Prescaler
2302 B6HF 2303 B6HF
General Description 2302, 2303 single chip dual Phase Locked Loop (PLL) synthesizers with programmable frequency dividers mobile communication equipment. fabricated using Siemens B6HF silicon bipolar process. circuit consists high speed dual modulus dividers, shift registers, programmable counters R-counters), phase detectors with charge pump control logic block. Since high speed dual modulus dividers able handle frequencies 1.25 (2.5 GHz), there need dedicated external prescaler. second dual modulus divider handles frequencies MHz. switching signals dividing ratios generated corresponding A-counters. A-counter N-down-counter programmable 3-wire bus. They clocked dual modulus divider output signals. carry outputs N-counters connected frequency inputs corresponding phase detectors controlling loading programmed A-/N-counter start values. R-counters also programmable serving reference frequency dividers. Their carry outputs connected corresponding reference frequency inputs phase detector controlling loading programmed counter start values. phase detectors PFD-type (phase frequency sensitive). They have linear output characteristic phase error region. control logic handles phase detectors output polarity, charge pump output currents software-generated power-on (all circuit parts except shift registers data latches). Applications mobile communication analog digital systems RFand synthesizers
Type 2302-R 2303-R Features
Package P-TSSOP-20-1 (Shrink, SMD) P-TSSOP-20-1 (Shrink, SMD)
Integrated prescaler operating current Different power-down modes High input sensitivity, high input frequency fast phase detectors without dead zone Linearization phase detector output current sources Large dividing ratios small channel spacing PLL1 2302 2303 max. freq. 1.25 prescaler: :32/:33 :64/:65 A1-counter N1-counter 2047 1023 R1-counter 2047 2047 PLL2 2302 2303 max. freq. prescaler: :16/:17 :16/:17 A2-counter N2-counter 1023 1023 R2-counter 2047 2047 Serial control (3-wire bus: data, clock, enable) fast programming (fmax MHz) Switchable polarity phase detector current programmable port output (TTL push-pull) External current setting phase detector outputs Lock detect output with gated pulse (quasi digital lock detect) Operating voltage P-TSSOP-20 package Temperature range
Siemens Aktiengesellschaft
1.25-GHz Dual with Prescaler 2.5-GHz Dual with Prescaler
2302 B6HF 2303 B6HF
Divider (÷64
A1-Counter
(10) Latch Counter
Latch (Idle) Adress Latch Control Test CT0, CT1,
1-Counter
(10) Latch Counter
Shift Register Latch Charge Pump Latch Counter
Counter
VCON
Phase Detector Control Test Phase Detector
Port
VCON
CT0, Latch Charge Pump Counter
Latch Control Test Adress Latch (Idle)
Latch Counter
Shift Register A2-Counter Latch N2-Counter Latch (Idle)
Divider
Latch Counter
A2-Counter
ITB08470
Block Diagram
Siemens Aktiengesellschaft
Frequency Synthesizer
2306 2307
General Description 2306, 2307 high speed CMOS especially designed battery-powered radio equipment mobile telephones. intended application will GSM, PCN, DECT other digital mobile systems. wide range dividing ratios also allows application analog systems. circuit consists reference-, N-counter, dual-modulus-control logic, phase detector with charge pump serial control logic. setting operating mode selection counter ratios done serially ports CLK, operating modes allow selection single dual operation, asynchronous synchronous data acquisition, different antibacklash-impulse times, different PD-output current modes, polarity setting PD-output signal, adjustment trigger-edge MOD-output signal, standby modes control multifunction outputs MFO1 MFO2. reference frequency applied input scaled down R-counter. maximum value MHz. frequency applied input scaled down N/A-counter according single dual-mode operation. maximum value single-, dual-mode operation. phase detector frequency phase sensitive. produces phase detector signal with adjustable antibacklash impulses order prevent dead zone very small phase deviations. Phase differences smaller than therefore resolved. Programming done serial data control. contents messages assigned functional units according destination address. Single dual-mode operation well asynchronous synchronous data acquisition status should therefore precede programming counters. 2306/PMB 2307 offer possibility synchronous data acquisition avoid error signals phase detector non-corresponding dividing factors counters produced asynchronous loading. Synchronous programming guarantees control during changes frequency channel. That means that state phase detector phase difference kept maintained, case "lock in", control process starts with phase difference "zero". Synchronous transmission particularly advantageous when large transfers channel made specific short transient recovery time. this purpose larger reference frequency switched order achieve rapid"rough"-transient response, increasing bandwidth loop time. When reaching "quasi lock-in" state, reference frequency switched back original values.
Type 2306-T 2306-R 2307-R
Package P-DSO-14-1 (SMD) P-TSSOP-16-1 (Shrink, SMD) P-TSSOP-16-1 (Shrink, SMD)
Adjustment "actual" value then takes place with usual transient response small transfers channel. synchronous transmission ensures that additional phase errors arise change reference frequencies. 2306/2307 standby modes (standby1, reduce current consumption. Standby1 switches whole circuit, current consumption reduced below Standby2 switches counters, charge pump outputs, only preamplifiers stay active. standby modes affect port output signal. influence other output signals standby table. Features operating current consumption operating voltage 2306: 2307: High input sensitivity, high input frequencies (220 MHz) Extremely fast phase detector without dead zone Linearization phase detector output current sources Synchronous programming counters (N-, N/A-, R-counters) system parameters Fast modulus switchover 65-MHz operation Switchable modulus trigger edge Large dividing ratios small channel spacing A-scaler N-scaler 16380 R-scaler 65535 Serial control (3-wire bus: data, clock, enable) fast programming (fmax MHz) Switchable polarity rate trimming rise phase detector multifunction outputs Digital phase detector output signals (e.g. external charge pump) frn, outputs N-scalers Port output (e.g. standby prescaler) External current setting output Lock detect output with gated antibacklash pulse (quasi digital lock detect)
Siemens Aktiengesellschaft
Frequency Synthesizer
2306 2307
R-Counter Data Register
PhaseDetector
LockDetector
Shadow Register MFO1
Shift Register
Charge Pump
MFO2
Modulus-Control
N-Counter
A-Counter
Data Register Shadow Register
Data Register Shadow Register
Shift Register
Shift Register
Serial Control Logic
ITB04206
Block Diagram Siemens Aktiengesellschaft
1.25-GHz with Prescaler 2.5-GHz with Prescaler
2308 B6HF 2309 B6HF
General Description 2308, 2309 Phase Locked Loop (PLL) synthesizers with programmable frequency dividers mobile communication equipment. fabricated using Siemens B6HF silicon bipolar process. circuit consists high speed dual modulus divider, shift register, programmable counter (A-, R-counter), phase detector with charge pump control logic block. Since high speed dual modulus divider able handle frequencies 1.25 (2.5) GHz, there need dedicated external prescaler. switching signals dividing ratio 16/17 (32/33) generated A-counter. A-counter N-down-counter programmable 3-wire bus. They clocked dual modulus divider output signal. carry output N-counter connected frequency input phase detector controlling loading programmed A-/N-counter start values. R-counter also programmable serving reference frequency divider. carry output connected reference frequency input phase detector controlling loading programmed counter start value. phase detector PFD-type (phase frequency sensitive). linear output characteristic phase error region. control logic handles phase detector output polarity, charge pump output current software-generated powerdown (all circuit parts except shift registers data latches). Applications mobile communication analog digital systems RFand synthesizers
Type 2308-R 2309-R Features
Package P-TSSOP-16-1 (Shrink, SMD) P-TSSOP-16-1 (Shrink, SMD)
Integrated prescaler operating current Different power-down modes High input sensitivity, high input frequency Fast phase detector without dead zone Linearization phase detector output current sources Large dividing ratios small channel spacing 2308 2309 max. freq. 1.25 prescaler: :16/:17 :32/:33 A-counter N-counter 4095 2047 R-counter 2047 2047 Serial control (3-wire bus: data, clock, enable) fast programming (fmax MHz) Switchable polarity phase detector current programmable port output (TTL push-pull) External current setting phase detector output Lock detect output with gated pulse (quasi-digital lock detect) Operating voltage P-TSSOP-16 package Temperature range
Siemens Aktiengesellschaft
1.25-GHz with Prescaler 2.5-GHz with Prescaler
2308 2309
Divider (÷32
VCOA
A1-Counter
(11) Counter
Latch (Idle) Adress Latch Control Test
Latch A-Counter
Latch
Shift Register Latch Charge Pump
Shifted First
Latch Counter
Counter
VCON
CT0, CT1, Control Test Phase Detector Power Down
Port
ITB08471
Block Diagram Siemens Aktiengesellschaft
1.1-GHz Prescaler 2.1-GHz Prescaler
2313 B6HF 2314 B6HF
General Description 2313, 2314 prescaler family designed mobile radio communication devices. fabricated using Siemens B6HF silicon bipolar process. power consumption, supply voltage down phase noise generation suitable various battery powered handheld systems. balanced differential inputs connected either symmetrically asymmetrically. Depending logic level input dividing ratio fixed 1:64/65 1:128/129. input determines whether modulus 1/(n+1) (n=64 n=128, according level) active. switched low-power standby mode (input STB). input TTL/CMOS compatible. emitter follower output CMOS compatible. Applications analog digital mobile communication systems part synthesizers.
Type 2313-T 2314-T Features
Package P-DSO-8-1 (SMD) P-DSO-8-1 (SMD)
operating current Power-down mode High input sensitivity Wide input frequency range 2313: 2314: noise Operating voltage P-DSO-8 package Temperature range
1:64 1:128
ITB08472
Block Diagram
Siemens Aktiengesellschaft
2.0-GHz Mixer 2.0-GHz Mixer
2330 2331 B6HF
General Description 2330, 2331 power, double balanced up-/downconversion Gilbert cell mixers GHz. 2331 fabricated using Siemens B6HF silicon bipolar process. Differential signals symmetrical circuits used throughout mixer. mixer input used balanced unbalanced configuration. mixer outputs high impedance open collector outputs. adjustable mixer current allows improve mixer performance. internal bias driver generates supply voltage temperature compensated reference voltages. Applications analog digital mobile communication systems downconverter mixer.
Type 2330-T 2331-T Features
Package P-DSO-8-1 (SMD) P-DSO-8-1 (SMD)
operating current operating voltage: 2330: 2331: Power-down mode IF-frequency range Mixer current adjustable noise figure High conversion gain Excellent intercept performance Good suppression input signals output High isolation values external components P-DSO-8 package Temperature range
Bias
ITB08473
Block Diagram
Siemens Aktiengesellschaft
1.1-GHz Mixer
2332 B6HF
General Description 2332 noise amplifier (LNA) double balanced mixer mobile communication equipment. fabricated using Siemens B6HF silicon bipolar process. amplified signal external available further output level allows switch gain (on/off: dB). mixer general purpose downconversion Gilbert cell mixer. Differential signals symmetrical circuits used throughout mixer. mixer input used balanced unbalanced configuration. mixer outputs high impedance open collector outputs. adjustable mixer current allows improve mixer performance. internal bias driver generates supply voltage temperature compensated reference voltages. allows mixer bandgap part switched power-down mode. Applications analog digital mobile communication systems frontend-LNA up-/ downconverter mixer.
Type 2332-R Features
Package P-TSSOP-16-1 (Shrink, SMD)
operating current Power-down mode frequency range Switchable gain High gain (typ. MHz) noise figure (typ. MHz) Double balanced mixer with high gain Excellent intercept performance High isolation values external components Operating voltage P-TSSOP-16 package Temperature range
Mixer
Bias
AREF
ITB08474
Block Diagram
Siemens Aktiengesellschaft
3-GHz LNA/Driver Mixer
2333 B6HF
General Description 2333 power amplifier double balanced mixer mobile communication equipment. fabricated using Siemens B6HF silicon bipolar process. amplifier used noise amplifier (LNA) driver amplifier. amplified signal external available further open collector output level allows adjust amplifier current gain. current recommended using amplifier LNA, higher current using driver. mixer general purpose downconversion Gilbert cell mixer. Differential signals symmetrical circuits used throughout mixer. mixer input used balanced unbalanced configuration. mixer outputs high impedance open collector outputs. adjustable mixer current allows improve mixer performance. internal bias driver generates supply voltage temperature compensated reference voltages. allows mixer bandgap part switched power-down mode. Applications analog digital mobile communication systems frontend-LNA preamplifier-driver up-/downconverter mixer.
Type 2333-R Features
Package P-TSSOP-16-1 (Shrink, SMD)
operating current Power-down mode Amplifier frequency range LNA: Variable gain, High gain (typ. GHz), noise figure (typ. GHz) Driver-amplifier: Variable gain, High output (typ. GHz) Double balanced mixer with high gain Excellent intercept performance High isolation values external components Operating voltage T-SSOP-16 package Temperature range
Mixer
Bias
AREF
ITB08475
Block Diagram
Siemens Aktiengesellschaft
Digital Terminal
Siemens Aktiengesellschaft
Digital Terminals
Positioning described products different kinds applications/segments.
Type ISAC 2085 2086 ISAC®-S 2186 ISAC 20950 ISAC®-P 2196 SmartLink-P 2197 ARCOFI® 2160 ARCOFI 2161 ARCOFI®-SP 2163 2165 ITAC® 2110 ISAR 7110 HSCX-TE 21525 JADE 7280
Video
Data
Voice
Page
Main application Optional Depending application products other segments like ESCC2; IBC; IEC-Q should also considered.
Siemens Aktiengesellschaft
Overview Digital Terminals
ISDN Voice Terminals With digitization local loops, needed adapt voice data sources. Because analog/digital conversion implemented telephone, Digital Signal Processing techniques (DSP) suitably powerful tools accomplishing this task. ARCOFI® 2160, ARCOFI®-BA 2161 ARCOFI®-SP 2165 2163 make best this technology deliver programmable, telephone specific codec/filter. modular concept allows support several interfaces like (ISAC®-P), (ISAC®-P SmartLink-P), (ISAC®-S, ISAC®-S (IEC-Q, IEC-T). interface controllers including layer-1, support IOM-2 software compatible.
adaptation existing data terminals (DTE) ISDN through variety interfaces (X.21, V24, RS232C, subject being covered number emerging standards. ITAC ISDN adapter circuit 2110 brings flexible solution each configuration. typical subscriber terminal configuration shown figure
Extendible Integrated Voice Data Terminals Packet Data e.g. X.25 Character Data e.g. X.21 Voice kbit Interface
HSCX 82525
ITAC 2110
ARCOFI 2160 ARCOFI 2161 ARCOFI 2165 2163
(optional)
ISAC 2085 2086 ISAC 2186 ISAC 20950 ISAC 2196 Smart Link-P 2197
Figure ISDN Voice Terminal (extendible integrated voice/data applications)
ITA03699
Siemens Aktiengesellschaft
Overview Digital Terminals
ISDN Data Access Shorter dial-up times, higher data rates simultaneous voice/data transmission comparing analog transfer modem make ISDN very interesting data access. Especially ISDN data transfer card becoming more more popular. signs below show solutions passive cards. passive cost version (figure optimal point-to-point data transfer. modular concept this version includes HDLC controllers interface controllers (optional UP0-, UPN-, S0-, Uk0-interfaces ISDN Voice Terminals). serial controllers HSCX (8-bit interface) ESCC2 (16-bit interface) used many applications telecom datacom systems offering dual channel HDLC controlling capability.
shown enhanced passive PC-card version (figure includes interface controllers DSP-based solution. There dedicated ROM-coded DSP-version supporting modem (V.32), (V.29), data adaption (V.110, USART framing) HDLC controlling development. Please contact Siemens sales office details. Like ISDN Voice Terminals (figure both PC-card version expendible voice active PC-card solutions.
HSCX Bit) 82525 ESCC2 Bit) 82532
ISAC (PSB 2186)
ISAR 7110
ISAC (PSB 2186)
Local
Local
PC-Interface
PC-Interface
ITA06116
ITA06117
Figure Passive Low-Cost PC-Card Solution
Figure Enhanced Passive PC-Card Solution Optimized ROM-Coded DSP-Solution development)
Siemens Aktiengesellschaft
Overview Digital Terminals
ISDN Video Terminals Together with video compression (VCP) from 8x8, Siemens offers system solution H.320 ISDN-based video communication. This four chip solution includes ARCOFI-SP (PSB 2165) Joint Audio Decoder-Encoder JADE (PSB 7280) ISAC-S (PSB 2186).
single-chip programmable video processor, which support standards H.261, MPEG1, MPEG2 IPEG. Siemens audio compression JADE supports following standards: G.711, G.722, G.728. figure shows videophone solution.
ISDN S-Interface
ISAC (PSB 2186)
SRAM 3100 Series DRAM Camera Video Capture Video Video Host Audio JADE 7280
ARCOFI 2163
Microphone
Speakers
80C535
Figure IIT-Siemens Chipset Single Board Videophone Block Diagram
ITA06118
Siemens Aktiengesellschaft
Digital Terminal
Product Overview Type 2085 2086 2186 20950 2196 2197 2160 2161 2163 2165 7110 2110 21525 7280 Short Title ISAC ISAC ISAC®-S ISAC ISAC SmartLink-P ARCOFI
Description ISDN Subscriber Access Controller ISDN Subscriber Access Controller ISDN Subscriber Access Controller ISDN Subscriber Access Controller ISDN Subscriber Access Controller Subscriber Access Controller Audio Ringing Codec Filter Audio Ringing Codec Filter Audio Ringing Codec Filter Audio Ringing Codec Filter ISDN Subscriber Access ISDN Terminal Adapter Circuit High-Level Serial Communication Controller Extended Joint Audio Decoder Encoder
Page
ARCOFI®-BA ARCOFI ARCOFI ISAR ITAC
HSCX-TE JADE
Siemens Aktiengesellschaft
ISDN Subscriber Access Controller (ISAC®-S)
2085 2086
General Description 2085/86 ISAC-S implements four-wire interface used link voice/data terminals ISDN. component switches D-channels between ISDN Oriented Modular (IOM) interfaces, latter being standard backplane interface ISDN basic access. HDLC packets ISDN D-channel handled ISAC-S which interfaces them associated microcontroller. Applications Voice/Data Terminals ISDN Cards/Terminal Adapters Videophone Video Cards/Conferencing Systems Tele Control Systems Point-of-Sales Terminal
Type 2085-N 2085-P 2086-H 2086-N Features
Package P-LCC-44-1 (SMD) P-DIP-40-2 P-MQFP-64-1 (SMD) P-LCC-44-1 (SMD)
Full duplex 2B+D interface transceiver according CCITT I.430 Conversion frame structure between interface Receive timing recovery according selected operating mode D-channel access control; support LAPD protocol FlFO-buffer bytes) efficient transfer D-channel packets 8-bit microprocessor interface, multiplexed nonmultiplexed Serial interface: IOM-1, SLD, SSI, IOM-2 Implementation IOM-1/IOM-2-MONITOR C/Ichannel protocol control peripheral devices Watchdog timer
Switching D-Channel Handling Interface B-Channel Buffer ISDN Basic Access Layer-1 Functions Control
FIFO
Interface
Block Diagram
ITB00843
Siemens Aktiengesellschaft
ISDN Subscriber Access Controller Terminal Applications (ISAC®-S
2186
General Description 2186 ISAC-S implements four-wire interface used link voice/data terminals ISDN. component switches D-channels between ISDN Oriented Modular (IOM-2) interfaces, latter being standard backplane interface ISDN basic access. HDLC packets ISDN D-channel handled ISAC-S which interfaces them associated microcontroller. Applications Voice/Data Terminals ISDN Cards/Terminal Adapters Videophone Video Cards/Conferencing Systems Tele Control Systems Cash Register Internetworks Point-of-sales terminals
Type 2186-H 2186-N 2186-P Features
Package P-MQFP-64-1 (SMD) P-LCC-44-1 (SMD) P-DIP-40-2
IOM-2 terminal specific version 2086 (downward compatibility) Full duplex 2B+D S0-interface transceiver according CCITT I.430 Conversion frame structure between interface IOM-2 D-channel access control; support LAPD control FIFO buffer bytes) efficient transfer D-channel packets 8-bit microprocessor interface, multiplexed non-multiplexed Serial interface: IOM-2 interface including clock strobe signal Implementation IOM-2 MONITOR C/l-channel protocol control peripheral devices
B-Channel Buffer Switching Interface D-Channel Handling ISDNBasic Access Layer-1 Functions Control
FIFO
µP-Interface
Block Diagram
ITB05406
Siemens Aktiengesellschaft
ISDN Subscriber Access Controller (ISAC®-P)
20950
General Description ISAC-P 20950 combination transceiver HDLC controller ISDN terminals two-wire environment. Transceiver functions performed according two-wire industry standard UP0. This corresponds functions available 2095. Similarly HDLC protocol processed described 2070. ISAC-P represents both single
Type 20950-N 20950-P Features
Package P-LCC-44-1 (SMD) P-DIP-40-2
Half-duplex burst-mode two-wire transceiver AMI-line code Adaptive line equalization High-level support LAPD protocol FlFO-buffer bytes) efficient transfer D-channel packets interface other Switching test loops 8-bit interface Advanced CMOS technology power consumption
Code
Port Port Scramble Interface HDLC Receiver LAPD HDLC Transmitter Controller Status Command Register R-FIFO X-FIFO FIFO Controller
Decode
Descramble
Buffer
Timing ADPLL µP-Interface
ITB01499
Block Diagram
Siemens Aktiengesellschaft
ISDN Subscriber Access Controller UPN-Interface Terminals (ISAC®-P
2196
General Description 2196, ISDN Subscriber Access Controller interface ISAC-P implements subscriber access functions digital terminal connected two-wire interface. 2196 ISAC-P optimized device TE-applications, covering complete layer-1 functions. 2196 ISAC-P combines functions transceiver with reduced loop length (one channel OCTAT-P 2096) ISDN-Communications Controller (ICC, 2070) onto chip. microcontroller interface ISAC-P compatible standard multiplexed microcontrollers. addition provides microcontroller clock signal well supply voltage control reset generation. terminal repeater function ISAC-P allows cascade telephones which controlled interface from line card. 2196 ISAC-P interfaces voice/data devices IOM-2 interface. 2196 ISAC-P micron CMOS device offered P-LCC-44 P-MQFP-44 package. operates from single supply. Note: document refers version standard with reduced loop length.
Type 2196-H 2196-N Features
Package P-MQFP-44-2 (SMD) P-LCC-44-1 (SMD)
Cost/performance-optimized UPN-interface transceiver, compatible 2096 OCTAT-P HDLC controller with 32-byte FIFO direction HDLC-address recognition control field handling compatible 2070 IOM-2 interface terminal application compatible 2070 8-bit multiplexed microprocessor interface 4-wire serial programming interface clock reset outputs Test loops Advanced CMOS technology
Siemens Aktiengesellschaft
ISDN Subscriber Access Controller UPN-Interface Terminals (ISAC®-P
2196
TE-Mode Contrast Pulse Width Modulator D-Channel Controller Interface Transceiver
Matrix Matrix Control
FIFO
Microcontroller Interface Reset Logic
Block Diagram ISAC®-P TE-Mode
Microcontroller
ITB05320
TR-Mode
Transceiver Interface
Reset
ITB05321
Block Diagram ISAC®-P TR-Mode
Siemens Aktiengesellschaft
Subscriber Access Controller UPN-Interface Terminals (SmartLink-P)
2197
General Description 2197, SmartLink-P, implements subscriber access functions digital terminal connected two-wire interface. 2197 SmartLink-P optimized device applications, covering complete layer-1 basic layer-2 functions digital terminals. 2197 SmartLink-P combines functions transceiver with reduced loop length (one channel OCTAT-P 2096) simple HDLC controller signaling data onto chip. pulse width modulator included provide LCD-contrast control ring tone signal. serial control port SmartLink-P compatible most serial interfaces microcontrollers. addition provides microcontroller clock signal well undervoltage detector reset generation including watchdog function. Terminal Repeater function SmartLink-P allows cascade telephones which controlled interface from line card extend loop length using IEC-Q transceiver. SmartLink-P also used simple HDLC controller which provides TlC-bus access procedure. this mode, transceiver inactive. 2197 SmartLink-P interfaces voice/data devices IOM-2 interface provides additional clock strobe signal standard codecs. upstream B-channel information muted loop back downstream data. 2197 SmartLink-P 1-micron CMOS device offered P-DSO-28 package. operates from single supply. Note: document refers version standard with reduced loop length.
Type 2197-T Features
Package P-DSO-28-1 (SMD)
Cost/performance-optimized interface tranceiver, compatible 2096 OCTAT-P 2196 ISAC-P HDLC controller with 4-byte FIFO direction IOM-2 interface terminal application including clock strobe signal Uplink MUTE function Selective B-channel loop back Serial control port Pulse width output LCD-contrast control ring tone generation clock reset output Watchdog timer Test loops Advanced CMOS technology power consumption: active: max.
Siemens Aktiengesellschaft
Subscriber Access Controller UPN-Interface Terminals (SmartLink-P)
2197
TE-Mode Interface
Pulse Width Modulator Ring Tone Generator
D-Channel Controller
Transceiver
FIFO
Serial Control Port
Clock, Reset
Microcontroller
Block Diagram SmartLink-P TE-Mode
ITB06298
TR-Mode
Transceiver Interface
Reset
ITB05321
Block Diagram SmartLink-P TR-Mode
Siemens Aktiengesellschaft
Audio Ringing Codec Filter (ARCOFI®)
2160
General Description 2160 ARCOFI provides subscriber with optimized audio, ringing, codec, filter processor solution digital telephone. fulfills necessary requirements completion low-cost digital telephone. Applications Voice Terminals Voice/Data Terminals Telephones with Interface Voice featured Cards Machines Terminal Adapter
Type 2160-N 2160-P Features
Package P-LCC-28-1 (SMD) P-DIP-24-1
Applications digital terminal equipment including voice path Digital signal processing (DSP) performs CODEC functions Fully compatible G.714/CCITT specifications G.711/CCITT A-Law/µ-Law 16-bit linear data IOM-2 serial interface DTMF, tone ringing generators Separate output piezo ringer Dual analog inputs handset "hands-free" microphones plus auxiliary differential analog input sets differential outputs handset earpiece loudspeaker (sine wave) loadspeaker driver capability Test maintenance loopbacks analog front digital processor power CMOS technology Power consumption active: standby:
XINP XINN
Digital Signal Processor Peripheral Control Interface
AFHM
Timing Unit Coefficient GNDA GNDD
SLD-IOM Interface
DCLK
ITB00891
Block Diagram
Siemens Aktiengesellschaft
Audio Ringing Codec Filter Basic Function (ARCOFI®-BA)
2161
General Description 2161 ARCOFI-BA provides Design Engineer with cost-optimized audio, ringing, codec, filter processor solution simple digital terminals. offers minimum functions necessary develop low-cost telephone thus with high flexibility technics. Applications Low-Cost Voice Terminals Voice/Data Terminals Telephones with Interface Voice featured Cards Video Conference Terminals Machines Terminal Adapter
Type 2161 Features
Package P-DSO-28-1 (SMD)
Programmable Analog Front (AFE), enables direct connection microphones, earpiece loudspeaker Digital signal processing performs CODEC functions Fully compatible CCITT ETSI (NET33) specification A-Law/µ-Law CCITT) 16-bit linear data IOM-2 interface (TE- non-TE-mode), Serial Control Interface (SCI) Serial Data Interface (SDI) Three analog inputs: differential, high performance inputs microphones plus single-ended auxiliary input differential outputs handset earpiece (200 loudspeaker 100-mW sine wave 200-mW square wave loadspeaker driver capability Separate digital output piezo ringer Flexible Peripheral Control Interface (PCI) IOM-2 TE-mode Flexible DTMF, tone ringing generator Single power supply power consumption: standby
Configuration Coefficients
Peripheral Control Serial Control Interface Analog Front Data Digital Signal Processor Data Serial Data Interface
Audio
Timing Unit Reset Logic
ITB05593
Block Diagram
Siemens Aktiengesellschaft
Audio Ringing Codec Filter (ARCOFI®-SP) Featuring Enhanced Speakerphone
2163
General Description 2163 ARCOFI-SP provides subscriber with DSP-based audio, ringing, codec, filter-processor solution digital telephone. fulfills necessary requirements completion low-cost digital telephone featuring digital speakerphone controlled loudhearing. Applications Voice Terminals Voice/Data Terminals Telephones with Interface Voice Featured Cards Video Conference Terminals Machines Terminal Adapter
Type 2163-N 2163-P 2163-T Features
Package P-LCC-28-1 (SMD) P-DIP-28-1 P-DSO-28-1 (SMD)
Programmable Analog Front (AFE), enables direct connection microphones, earpiece loudspeaker 42+3 transmit amplification chip, allows direct connection speakerphone microphone without external OpAmp Digital signal processing performs CODEC functions Fully compatible G.714/CCITT NET33/ETSI specifications G.711/CCITT A-Law/µ-Law 16-bit linear data IOM-2 IOM-2 MHz) SCI/SDI serial data interfaces Enhanced digital speakerphone support without external devices: "Stronger-Wins" Algorithm enables mode switching just speaking louder Controlled monitoring (loudhearing) without external devices Automatic Gain-Control (AGC) transmit receive direction (square) (sine wave) loudspeaker driver capability Flexible DTMF, tone ringing generator power consumption (standby
Configuration Coefficients
Peripheral Control Serial Control Interface Analog Front Data Digital Signal Processor Data Serial Data Interface
Audio
Timing Unit Reset Logic
ITB05593
Block Diagram
Siemens Aktiengesellschaft
Audio Ringing Codec Filter (ARCOFI®-SP) Featuring Speakerphone Function
2165
General Description 2165 ARCOFI-SP provides subscriber with optimized Audio, Ringing, Codec, Filter processor solution digital telephone. fulfills necessary requirements completion low-cost digital telephone. ARCOFI-SP performs coding, decoding filtering functions according CCITT AT&T standard. Full featured applications possible without external elements. necessary hardware software implemented. addition, ARCOFI-SP offers speakerphone function well controlled monitoring. These features fully implemented chip. independent receive channels offer more flexible tone generator, digital gain stages, frequency correction. transducer correction filters (one each direction) programmed correct analog transducer frequency characteristics. ARCOFI-SP provides universal DTMF, tone ringing generator. generated tone sequences switchable each output. This flexible tone generator concept fulfills current specifications. interfacing handset mouth earpiece facilitated flexible analog front end. loudspeaker output also been integrated chip well secondary input speakerphone microphone. Further auxiliary differential analog input available. analog inputs outputs gain programmable through software. Functional Description ARCOFI-SP bridges between audio world microphones, earphones, loudspeakers digital world providing full PCM-CODEC with necessary transmit receive filters well speakerphone monitoring function. ARCOFI-SP subdivided three main blocks: ARCOFI Analog Front (AFE) ARCOFI Signal Processor(ASP) ARCOFI Digital Interface (ADI).
Type 2165-N 2165-P Features
Package P-LCC-28-1 (SMD) P-DIP-28-1
Applications digital terminal equipment featuring voice functions Digital signal processing performs CODEC functions Fully compatible G.714 CCITT specifications A-Law/µ-Law 16-bit linear data IOM-2 serial data interface Full digital speakerphone support without external devices Automatic Gain Control (AGC) transmit direction Controlled monitoring (loudhearing) without external devices Dual analog input microphone handset single-ended input speakerphone plus auxiliary differential analog input differential outputs handset earpiece loudspeaker 100-mW (sine wave) loudspeaker driver capability Independent gain programmable amplifiers analog inputs outputs Flexible Peripheral Control Interface (PCI) Flexible test maintenance loopbacks analog front digital signal processor Flexible DTMF, tone ringing generator power consumption (standby Advanced CMOS technology, single power supply Hardware software support Siemens ISDN Board SIPB 5000 ARCOFI-SP coefficient program ARCOS Plus SIPO 2165
Siemens Aktiengesellschaft
Audio Ringing Codec Filter (ARCOFI®-SP) Featuring Speakerphone Function
2165
Auxiliary Speakerphone Handset Microphone
Amplifier
Signal Processing
PiezoRinger
Tone DTMF Generator
Speakerphone Monitoring)
Side Tone
Futher Terminal Functions
Loudspeaker Earpiece
Amplifier
Signal Processing
Power Supply
Amplifier
ITA03966
Signal Flow Diagram
Siemens Aktiengesellschaft
ISDN Data Access Controller (ISAR)
7110
General Description 7110 ISAR been designed advanced solution passive ISDN cards stand alone terminal adapter boxes. ISDN-data access controller, which supports data rate adaption, standard HDLC protocolling communication with remote analog modem applications. Applications ISDN Card /Standalone ISDN Data Terminals Modem Radio Loop Digital Terminal Manufacturers Computer Manufacturers Modem Producers
Type 7110-F Features
Package P-TQFP-100-1 (SMD)
universal formatter supporting async, HDLC binary framing B-channel data HDLC formatter with TIC-bus support D-channel applications terminal mode Fax/modem modulation 14.4 kbaud (V.32bis, V.17) including fall back modes DTMF generation reception Kbyte on-chip internal HDLC-frame buffering 256-byte FIFO direction host interface communication Kbyte external SRAM interface V.32bis support
IOM®-2
Time-slot Assign
Time-slot Assign
Pump Data TransDV.110 Modem Modem parent
Pump V.110 Transparent
SART ASYNC HDLC
SART ASYNC HDLC HDLC
C/ITest Monitor Code DiagnoHandler Handler
Buffer
Buffer
Buffer
Buffer
Mailbox
Block Diagram
Host
ITB08608
Siemens Aktiengesellschaft
ISDN Terminal Adaptor Circuit (ITAC®)
2110
General Device Overview ISDN Terminal Adapter Circuit interfaces standard terminals circuit switched data network ISDN. supports both bitstuffing (V.110) flag-stuffing (V.120) adaption protocols. on-chip communication controllers handle signaling between data equipment network. Applications Voice/Data Terminals ISDN Cards ISDN Terminal Adapters
Type 2110-H 2110-N 2110-P Features
Package P-MQFP-44-1 (SMD) P-LCC-44-1 (SMD) P-DIP-40-1
Support async sync interfaces (X.21, X.21 V.24, RS232C, V.35) Modem control lines Programmable baud rates rate adaption according X.30, V.110, ECMA.102 USART HDLC controller support V.120 applications In-band parameter exchange signaling support Supports SSI- IOM-2 interface basic rate applications IOM-2 MONITOR channel controller Siemens/Intel multiplexed microprocessor interface Power-down (standby) mode
User Rate Interface Async Sync Converter
Intermediate Rate Intermediate Rate Converter Bearer Rate Converter
Handler
Synchronous Network Interface
Data Path Clock Multiplexer
Status Configuration Register Intermediate
DPLL XTAL1
USAR FIFO Byte
USAT FIFO Byte
HDLCR FIFO Byte
HDLCT FIFO Byte
Clock Network Generation User Rate XTAL2 10.752
Counter
Microcomputer Interface
Block Diagram
DACKO DACKI DMOR DMIR EODR
ITB02593
Siemens Aktiengesellschaft
High-Level Serial Communications Controller Terminals (HSCX-TE)
21525
General Description HSCX-TE optimized terminal version HSCX (SAB 82525). HSCX-TE been designed implement high-speed communication links using HDLC protocols reduce hardware software overhead needed serial synchronous communications. Applications ISDN Card/Standalone ISDN Data Terminal
Type 21525-H 21525-N Features
Package P-MQFP-44-2 (SMD) P-LCC-44-2 (SMD)
Optimized solution HSCX (SAB terminal equipment Non-auto mode transparent mode auto-mode) Clock mode only Transfer data blocks from/to system memory interrupt request mode) independent full-duplex HDLC channels Independent time-slot length (1-256 bit) Transparent receive/transmit data bytes without HDLC framing Various types protocol support depending operating mode 64-byte FIFOs channel direction 8-bit demultiplexed multiplexed interface
Channel SP-REG Decoder RTSA CTSA
STBB FSCB BCLB CTSB RTSB Channel
Block Diagram
ITB07459
Transmit FIFO Receive FIFO
Data Link Controller
BCLA FSCA STBA
Interface
Siemens Aktiengesellschaft
Joint Audio Decoder/Encoder (JADE)
7280
General Description 7280 device which implements voice compression algorithms defined ITU-TS G.711, G.722 G.728 Recommendation. fits best into every application where audicompression needed. Applications ISDN videophones Video conference systems Corporate networks voice concentrators gateways Data-over-voice voice-over-data terminals Networks (e.g. LANs) packetized voice Digital Added Main-Line (DAML) Digital Circuit Multiplication (DCME) equipment Voice storage e.g. based applications
Type 7280-H Features
Package P-TQFP-100-1 (SMD)
G.711/G.722/G.728 compression/decompression audio channel Programmable G.711/G.722/G.728 modes with mixed modes operation (e.g. G.722 receive G.728 transmit direction) A/µ-Law recognition G.711 mode (according G.725 Appendix modem signal recognition Accepts/outputs uncompressed audio 8-bit A/µ-Law, linear 16-bit format Serial H.221 oriented audio protocol direct connection Videocodec (VCP Inc.) universal serial HDLC/transparent data controllers Programmable on-chip internal clock generation from ISDN frequency clock program data memory chip Flexible interfaces (e.g. IOM-2, serial audio interface, parallel 8-bit host interface, external memory interface) Supply voltage: 0.5-µm CMOS technology
Siemens Aktiengesellschaft
Joint Audio Decoder/Encoder (JADE)
7280
AD(0:7)
INTR
Reset
Parallel Host Interface
Audio SCLK Serial Audio Mailbox Bytes HDLC HDLC
Mon, Control Config Control Register Prog Core Timers Data X-ROM Data X-RAM Data Data Y-RAM Y-RAM CLKO Clock XTAL XTAL
External Memory Interface
RADJ
CA(0:15) CD(0:15)
TCLK
ITB06115
Block Diagram
Siemens Aktiengesellschaft
Digital Exchange System
Subscriber Line Interface Codec Filter SLICOFI®; 3065
Siemens Aktiengesellschaft
Digital Exchange System
Positioning described products different kinds applications/segments:
Type Analog Line Card Digital Line Card Digital Primary Added Main Rate Line (DAML) Interface (PRI) Data Over Voice (DOV) Network Termination Remote Power Termination (NT/RP) Trunk Units
EPIC®-S EPIC®-1 ELIC® SICOFl® SICOFI®-2 SICOFI®-4 SICOFI®-4µC IDEC® SBCX QUAT®-S IEC-Q IEC-T Quad DFE-T Quad Quad DFE-Q OCTAT®-P IEPC ACFA IPAT®-2 PRISM FALCTM54 ARCOFI® ARCOFI®-SP ITAC® IRPC GPPC ISAC®-S ISAC®-P SLICOFI® HV-SLIC PRACT HSCX ESCC2 ESCC8 Main application Optional
Siemens Aktiengesellschaft
Digital Exchange System General Overview Architecture Devices
Subscriber Units Analog Line Cards
Switching Systems MTSS MTSC MTSL MUSAC EPIC EPIC ELIC HSCX ESCC2 MUNICH32
Group Processors
DAML DAML-RT DAML-COT
SICOFI SICOFI SICOFI SLICOFI SLIC HV-SLIC
EPIC EPIC ELIC HSCX
Digital Line Cards (Basic Rate) SBCX QUAT ISAC IEC-T IEC-Q OCTAT EPIC EPIC IDEC ELIC HSCX IEPC
Trunk Units ACFA IPAT HSCX PRISM ESCC2 ESCC8 FALC
Transmission Exchange Concentrator Multiplexer
(Primary Rate) ACFA IPAT PRACT PRISM HSCX FALC ESCC2 Highway
ITA03688
Siemens Aktiengesellschaft
Analog Line Cards
Product Overview
Type 2052 2054 2055 82525 82526 20550 2060 2260 2465 2466 3065 4065 Short Title EPIC®-S EPIC HSCX HSCX1 ELIC® SICOFl® SICOFI®-2 SICOFI SICOFI®-4 SLICOFl® HV-SLIC
Description Interface Controller Extended Interface Controller-Small Extended Interface Controller High-Level Serial Communication Controller Extended Extended Line Card Interface Controller Signal Processing Codec Filter Dual Channel Codec Filter Four Channel Codec Filter Four Channel Codec Filter with Interface Signal Processing with integrated voltage SLIC Codec Filter Subscriber Line Interface Circuit (High Voltage Part)
Page
Siemens Aktiengesellschaft
General Exchange Architecture
Analog Line Cards digital exchange system subscriber line boards provide link between subscriber switching network. basic functions analog line boards known under acronym BORSHT (Battery, Overvoltage, Ringing, Supervision, Hybrid, Testing). Additional important tasks voice frequency band limitation, analog digital conversion into time discrete digital equivalents, time-slot assignment highways handling signaling control information. conventional implementation uses ports interface subscriber line leading large amount wiring and, thus, problems crosstalk large board size.
conventional implementation also characterized fixed adjustment line interface conditions although telephone line conditions vary considerably with national standards even with subscriber line installations. Under adverse conditions telecommunication equipment must match subscriber line termination impedances while suppressing return echoes to-four-wire hybrid network. Compensating line attenuation just critical balancing voice signals transmission reception paths. improve voice quality, subscriber line boards have matched different line conditions means interchangeable discrete components. This approach very costly regarding line board design manufacturing. Furthermore, reliability board filled with parts, wires connections will decrease rapidly. best solution eliminate these line card trouble spots design standard line card, which customized various line conditions postal specifications through software control. right choice dedicate device allows optimal line card design each application public switches, systems well kinds multiplexers concentrators.
Siemens Aktiengesellschaft
General Overview Architecture Devices
Wires
Wires
Higway
SLIC
Analog Network
Codec Filter
Interface
Problem: Fixed hardware adjustment although line conditions vary considerably
General Line Board Structure Functions
ITA00217
General Line Card Function Component SLIC (Subscriber line interface circuit) Function Realization BORSHT function Battery feed Overvoltage Protection Ringing Supervision Hybrid Testing Matching input line independence Frequency response correction Hybrid balancing Gain adjustment Coding, conversion according A-Law µ-Law, voice Band limitation according CCITT LSSGR Time-slot assignment, PCM-data rate
Analog network CODEC/Filter
Siemens Aktiengesellschaft
Optimized Line Board Architecture
Siemens Semiconductor concept characterized centralized interface controller device providing variable Time-Slot Assignment (TSA), communication with subscriber line devices such signal processing codec/filter (SICOFI) ISDN devices (Subscriber Line Data) IOM-2 (ISDN Oriented Modular) interface, interface with microprocessor. characteristic architectural feature, test, monitoring, control purposes, device permits efficient switching data streams between these interfaces and, therefore, ensures transparency between channels control signaling data. This opens attractive possibilities such common-channel signaling microprocessor access data.
signal processing codec/filter (SICOFI) avoids analog network which matched different requirements interchanging discrete components. Based Digital Signal Processing (DSP) methods SICOFI allows complete control line conditions software. all-over flexibility programmability unique device concept gives user capability designing standard line card which optimized each application matched various line conditions. SLD/IOM-2 architecture leads highly modular line board configuration with wiring, reduced board area, and, dependent SLIC being used, very external discrete components.
SLIC
Codec Filter SICOFI SICOFI SICOFI SICOFI HV-SLIC+SLICOFI
Circuit Interface
Interface Controller
Transmit Highway Receive Highway
Electronic SLIC Transformer
EPIC EPIC ELIC EPIC EPIC ELIC EPIC EPIC ELIC
ITA00218
Siemens Analog Subscriber Lines, Configurations Interfaces
Siemens Aktiengesellschaft
SLD/IOM®-2 Interface
SLD-bus used (PCM Interface Controller) interface with subscriber line devices. Serial Interface Port (SlP) used transfer digital voice data, feature control signaling information between individual subscriber line devices, highways control backplane. approach provides common interface analog digital per-line components. Through PIC, which device SLD-architecture, data transparently switched onto highways. (Peripheral Board Controller) will make analog digital subscriber line boards plug-compatible line equipment rack. There three wires connecting each subscriber line device PIC: common clock signals shared among devices, unique bidirectional data link each eight lines. Direction signal (DIR) 8-kHz clock output from (master) that serves frame sync subscriber line devices (slave) well transfer indicator. data transferred 512-kHz rate, clocked Subscriber Clock (SCLK). When high (first half frame), four bytes digital data transmitted SLD-bus from slave (receive direction). During second half frame when low, four bytes data transferred from slave back (transmit direction).
Channel 64-kbit/s channels reserved voice data routed from highways. application where SICOFI connected SIP, voice received channel transmitted channel three-party conference, channel third-party voice channel. SlCOFls connected SIP, channel assigned channel other SICOFI. Conferencing possible this configuration. With digital subscriber line devices bytes used carry 64-kbit/s data channels. third sixth byte locations used transmit receive control information programming slave devices. last byte each direction reserved signaling data.
Siemens Aktiengesellschaft
SLD/IOM®-2 Interface
Subscriber
Subscriber Line Board SICOFI 2060 2260 SCLK 2052 EPIC 2055
Backplan
Frame (125 µs)-512 kbit Receive (downstream) Transmit (upstream)
SCLK
ITA00538
Frame Structure Interface
lOM®-Revision-2 (IOM®-2) standard defines industry standard serial interconnecting telecommunication ICs. standard covers line card, NT1, terminal architectures ISDN analog loop applications. line-card mode IOM-2 provides connection path between line transceivers (ISDN) codecs (analog), line-card controller; line card controller provides connection switch backbone. IOM-2 time multiplexes data, control, status information eight ISDN transceivers codec/filters over single full-duplex interface.
providing data, control, status information over serial channel, IOM-2 eliminates need have microprocessor interface transceiver codec. This reduces count simplifies line-card layout, thus reducing cost. Information multiplexed into frames, which transmitted 8-kHz rate. frames subdivided into from eight subframes, with subframe being dedicated each transceiver pair codecs. subframes provide channels data, programming, status information single transceiver codec pair.
Siemens Aktiengesellschaft
SLD/IOM®-2 Interface
channel structure IOM-2 interface follows: first octets constitute 64-bit/s B-channels. third octet monitor channel. used exchange data between devices using IOM-2 monitor channel protocol.
fourth octet (control channel) contains bits 16-kbit/s D-channel four-bit command/indication channel, ISDN applications command/indication channel analog subscriber applications bits supporting monitor channel protocol.
SICOFI 2260 SICOFI 2465 SLICOFI 3065 FSC: DCL:
FRAME CLOCK CLOCK FRAME
EPIC 2055 EPIC 2054 ELIC 20550
Frame Synchronization Data Clock Data Upstream Data Downstream
4096
Monitor
ITS02242
Multiplexed Frame Structure IOM®-2 Interface
Siemens Aktiengesellschaft
Interface Controller (PIC)
2052
General Description Interface Controller (PIC) 2052 device control voice, data signaling paths subscribers peripheral component boards digital communication systems. combination with highly flexible Signal Processing Codec Filter (SICOFI) 2060/2260 forms optimized, analog subscriber line board architecture. flexibility enables operation general-purpose controller data switching MUX/DEMUX applications. controls space time switching functions between subscriber line devices time division multiplex highways. Furthermore, controls flow information between subscriber inferface ports line card local processor. meet different requirements 2052 provides following interfaces: Eight serial, bidirectional ports transfer voice, data, control signaling information between codec filters (e.g. SICOFI 2060/2260), digital interface circuits signal processors. Double constructed interface redundant system configuration with load sharing operation. Bit-parallel interface connection standard 8-bit microcomputer such 8051.
Type 2052-N Features
Package P-LCC-44-1 (SMD)
Board controller subscribers digital switching system Suitable systems (24/32/48/64 time-slots) according European standards SLD-bus peripheral circuits, e.g. codec filter devices ISDN components Time-slot assignment freely programmable connected subscribers access internal data streams including time-slot oriented data streams functions software-programmable standard interface TTL-compatible inputs outputs, including clock input Single power supply Advanced power CMOS technology Applications Telecommunication subscriber board interface controller digital exchange systems performing: digital exchange functions digital concentrator functions signaling interface control functions multiplex functions
Subscriber (SLD Bus) (16)
Signa ling Contr Voice Data
Subscriber Interface Buffer
Voice Data
Interface Buffer
Highway Highway
Microprocessor Interface
Data Flow within
ITS00383
Siemens Aktiengesellschaft
Extended Interface Controller Small (EPIC®-S)
2054
General Description Information from subscriber lines needs transferred time-slots system internal communication highways. EPIC-S concentrates circuitry necessary this interfacing large number transmission lines single Therefore, necessary repeat this interface circuitry every line. Applications EPIC-S include communications multiplexers, concentrators, central switches, PBXs, well peripheral ISDN analog line cards. Features interface controller ISDN analog subscribers Time-slot assignment freely programmable subscribers Non-blocking switch channels Switching 16-, 32-, 64-kbit/s channels (128 kbit/s consecutive 64-kbit/s channels)
Type 2054-N 2054-N
Package P-LCC-44-1 (SMD) P-LCC-44-1 (SMD)
serial interfaces: configurable Programmable wide range data rates (PCM Mbit/s, configurable Mbit/s) Data rates configurable interfaces independent each other (data rate adaption) Change detection ("last look") logic signaling channels 16-byte FIFO monitor feature control channels Standard interface with multiplexed address/data separate address data busses Advanced power CMOS technology Also available with extended temperature range (PEF 2054-N) compatible with 2055
Timing
Configurable Interface Data Memory Interface
Control Memory Layer-1 Controller Buffer
Interface
Block Diagram
AD0-AD7
ITB05888
Siemens Aktiengesellschaft
Extended Interface Controller (EPIC®-1)
2055
General Description Information from subscriber lines needs transferred time-slots system internal communication highways. EPIC-1 concentrates circuitry necessary this interfacing large number transmission lines single Therefore, necessary repeat this interface circuitry every line. Since system cost EPIC-1 divided number lines controls, powerful comfortable functions economically performed. Features interface controller ISDN analog subscribers Time-slot assignment freely programmable subscribers Non-blocking switch channels Switching 16-, 32-, 64-kbit/s channels (128 kbit/s consecutive kbit/s channels) serial interfaces: configurable (IOM-2, IOM-1, SLD, PCM).
Type 2055-N 2055-N
Package P-LCC-44-1 (SMD) P-LCC-44-1 (SMD)
Interfacing with four full-duplex highways Mbit/s) Data rates configurable interfaces independent each other Change detection ("last look") logic signaling channels 16-byte FIFO monitor feature control channels Standard interface with multiplexed demultiplexed address/data separate address data busses Advanced power CMOS technology Also available with extended temperature range (PEF 2055-N)
SCLK
Timing
SIP0 SIP4 SIP1 SIP5 SIP2 SIP6 SIP3 SIP7
Configurable Interface
Data Memory
Interface
Control Memory Layer-1 Controller Buffer
Interface
Block Diagram
AD0-AD7
ITB00687
Siemens Aktiengesellschaft
Extended Line Card Controller (ELIC®)
20550
General Description Extended Line Card Controller (ELIC) 20550-H device allow control, supervision processing voice, data signaling information. also provides access microcontroller write/read data to/from interfaces gives control over layer-1 devices. Revolutionary multiplexing concept allowing only implemented HDLC controller process signaling information digital subscribers. switching part ELIC controls space times switching functions between subscriber line devices time division multiplex highways. Furthermore controls flow information between subscriber interface ports processor. processing signaling information different HDLC controllers implemented. SACCO Serial Access Communication Controller (HDLC) which allows extracting D-Channel information transported interface. data then passed microcontroller. downstream direction, SACCO passes data, packed HDLC protocol, from microcontroller interface. With interfaces, digital subscribers possible interface, former designs needed HDLC controllers (one D-channel every subscriber). SACCO ELIC serve channels time-multiplexing manner. This process controlled ARBITER. This part ELIC monitors D-channels interface locks SACCO onto D-channel soon start HDLC frame detected. After endflag HDLC frame been received, SACCO released a
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